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Conceptual
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RT8015
2A, 4MHz, Synchronous Step-Down Regulator
General Description
The RT8015 is a high efficiency synchronous, step-down DC/DC converter. Its input voltage range is from 2.6V to 5.5V and provides an adjustable regulated output voltage from 0.8V to 5V while delivering up to 2A of output current. The internal synchronous low on-resistance power switches increase efficiency and eliminate the need for an external Schottky diode. Switching frequency is set by an external resistor or can be synchronized to an external clock. 100% duty cycle provides low dropout operation extending battery life in portable systems. Current mode operation with external compensation allows the transient response to be optimized over a wide range of loads and output capacitors. RT8015 operation in forced continuous PWM Mode which minimizes ripple voltage and reduces the noise and RF interference. 100% duty cycle in Low Dropout Operation further maximize battery life.
Features
High Efficiency : Up to 95% Low RDS(ON) Internal Switches : 110m Programmable Frequency : 300kHz to 4MHz No Schottky Diode Required 0.8V Reference Allows Low Output Voltage Forced Continuous Mode Operation Low Dropout Operation : 100% Duty Cycle RoHS Compliant and 100% Lead (Pb)-Free
Applications
Portable Instruments Battery-Powered Equipment Notebook Computers Distributed Power Systems IP Phones Digital Cameras
Pin Configurations
(TOP VIEW)
SHDN/RT 8 2 3 4 GND 7 6 5 COMP FB VDD PVDD
Ordering Information
RT8015 Package Type SP : SOP-8 (Exposed Pad) Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard)
Note : RichTek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100% matte tin (Sn) plating.
GND LX PGND
SOP-8 (Exposed Pad)
Marking Information
For marking information, contact our sales representative directly or through a RichTek distributor located in your area, otherwise visit our website for detail.
DS8015-03C February 2007
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RT8015
Typical Application Circuit
VIN 2.6V to 5.5V ROSC 332k
Conceptual
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RT8015 1 SHDN/RT 2 3 4 GND LX PGND COMP FB VDD PVDD 8 7 6 5
RCOMP 7.5k
CCOMP 1.5nF R2 240k
CIN 22uF
R1 510k
L1 1uH COUT 22uF
VOUT 2.5V/2A
Note : Using all Ceramic Capacitors Layout Guide
C IN must be placed between V DD and GND as closer as possible V IN C IN GND Output capacitor must be near RT8015 C OUT V OUT LX should be connected to Inductor by wide and short trace, keep sensitive compontents away from this trace
RT8015 PVDD VDD FB R1 CF V OUT R2 COMP R COMP C COMP GND Connect the FB pin directly to feedback resistors. The resistor divider must be connected between V OUT and GND.
5 6 7 8 4 3 2 1
L1 PGND LX GND SHDN/RT
R OSC
Table 1 Component Supplier Series Inductance (uH) DCR (m) Current Rating (mA) Dimensions (mm) TAIYO YUDEN NR 4018 2.2 60 2700 4x4x1.8 Sumida CDRH4D28 2.2 31.3 2040 4.5x4.5x3 GOTREND GTSD53 2.2 29 2410 5x5x2.8 ABC SR0403 2.2 47 2600 4.5x4x3.2 Table 2
Component Supplier TDK TDK Panasonic Panasonic Panasonic TAIYO YUDEN TAIYO YUDEN TAIYO YUDEN
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Part No. C3225X5R0J226M C2012X5R0J106M ECJ4YB0J226M ECJ4YB1A226M ECJ4YB1A106M LMK325BJ226ML JMK316BJ226ML JMK212BJ106ML
Capacitance (uF) 22 10 22 22 10 22 22 10
Case Size 1210 0805 1210 1210 1210 1210 1206 0805
DS8015-03C February 2007
Conceptual Functional Pin Description
Pin Number 1 Pin Name SHDN/RT GND, Exposed Pad LX PGND PVDD VDD FB Pin Function
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RT8015
Oscillator Resistor Input. Connecting a resistor to ground from this pin sets the switching frequency. Forcing this pin to VDD causes the device to be shut down. Signal Ground. All small-signal components and compensation components should connect to this ground, which in turn connects to PGND at one point. Exposed pad should be soldered to PCB board and connected to GND. Internal Power MOSFET Switches Output. Connect this pin to the inductor. Power Ground. Connect this pin close to the (-) terminal of CIN and COUT. Power Input Supply. Decouple this pin to PGND with a capacitor. Signal Input Supply. Decouple this pin to GND with a capacitor. Normally VDD is equal to PVDD. Feedback Pin. Receives the feedback voltage from a resistive divider connected across the output. Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Connect external compensation elements to this pin to stabilize the control loop.
2 3 4 5 6 7
8
COMP
Function Block Diagram
SHDN/RT
SD ISEN OSC COMP 0.8V FB Output Clamp OC Limit Slope Com PVDD
EA
Int-SS 0.9V 0.7V Control Logic
Driver LX
NISEN POR 0.4V NMOS I Limit
PGND
VREF
OTP
GND
VDD
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RT8015
Operation
Main Control Loop
Conceptual
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The RT8015 is a monolithic, constant-frequency, current mode step-down DC/DC converter. During normal operation, the internal top power switch (P-Channel MOSFET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the peak inductor current reach the value defined by the voltage on the COMP pin. The error amplifier adjusts the voltage on the COMP pin by comparing the feedback signal from a resistor divider on the FB pin with an internal 0.8V reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference. The error amplifier raises the COMP voltage until the average inductor current matches the new load current. When the top power MOSFET shuts off, the synchronous power switch (N-Channel MOSFET) turns on until either the bottom current limit is reached or the beginning of the next clock cycle. The operating frequency is set by an external resistor connected between the RT pin and ground. The practical switching frequency can range from 300kHz to 4MHz. Power Good comparators will pull the PGOOD output low if the output voltage comes out of regulation by 12.5%. In an over-voltage condition, the top power MOSFET is turned off and the bottom power MOSFET is switched on until either the over-voltage condition clears or the bottom MOSFET's current limit is reached. Frequency Synchronization The internal oscillator of the RT8011 can be synchronized to an external clock connected to the SYNC pin. The frequency of the external clock can be in the range of 300kHz to 4MHz. For this application, the oscillator timing resistor should be chosen to correspond to a frequency that is about 20% lower than the synchronization frequency. Dropout Operation When the input supply voltage decreases toward the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle eventually reaching 100% duty cycle.
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The output voltage will then be determined by the input voltage minus the voltage drop across the internal P-Channel MOSFET and the inductor. Low Supply Operation The RT8015 is designed to operate down to an input supply voltage of 2.6V. One important consideration at low input supply voltages is that the RDS(ON) of the P-Channel and N-Channel power switches increases. The user should calculate the power dissipation when the RT8015 is used at 100% duty cycle with low input voltages to ensure that thermal limits are not exceeded. Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant frequency architectures by preventing sub-harmonic oscillations at duty cycles greater than 50%. It is accomplished internally by adding a compensating ramp to the inductor current signal. Normally, the maximum inductor peak current is reduced when slope compensation is added. In the RT8015, however, separated inductor current signals are used to monitor over current condition. This keeps the maximum output current relatively constant regardless of duty cycle. Short-Circuit Protection When the output is shorted to ground, the inductor current decays very slowly during a single switching cycle. A current runaway detector is used to monitor inductor current. As current increasing beyond the control of current loop, switching cycles will be skipped to prevent current runaway from occurring.
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Conceptual Absolute Maximum Ratings
(Note 1)
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RT8015
Supply Input Voltage, VDD, PVDD ---------------------------------------------------------------------------- -0.3V to 6V LX Pin Switch Voltage -------------------------------------------------------------------------------------------- -0.3V to (PVDD + 0.3V) Other I/O Pin Voltages ------------------------------------------------------------------------------------------- -0.3V to (VDD + 0.3V) LX Pin Switch Current -------------------------------------------------------------------------------------------- 4A Power Dissipation, PD @ TA = 25C SOP-8 (Exposed Pad) ------------------------------------------------------------------------------------------ 1.33W Package Thermal Resistance (Note 4) SOP-8 (Exposed Pad), JA -------------------------------------------------------------------------------------- 75C/W SOP-8 (Exposed Pad), JC ------------------------------------------------------------------------------------- 15C/W Junction Temperature --------------------------------------------------------------------------------------------- 150C Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------- 260C Storage Temperature Range ------------------------------------------------------------------------------------ -65C to 150C ESD Susceptibility (Note 2) HBM (Human Body Mode) -------------------------------------------------------------------------------------- 2kV MM (Machine Mode) ---------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
(Note 3)
Supply Input Voltage ---------------------------------------------------------------------------------------------- 2.6V to 5.5V Junction Temperature Range ------------------------------------------------------------------------------------ -40C to 125C Ambient Temperature Range ------------------------------------------------------------------------------------ -40C to 85C
Electrical Characteristics
(VDD = 3.3V, TA = 25C, unless otherwise specified)
Parameter Input Voltage Range Feedback Voltage DC Bias Current Output Voltage Line Regulation Output Voltage Load Regulation Error Amplifier Transconductance Current Sense Transresistance Power Good Range Power Good Pull-Down Resistance Switching Frequency Sync Frequency Range
Symbol VDD VFB
Test Conditions
Min 2.6 0.784
Typ -0.8 460 -0.04 0.25 800 0.4 12.5 -1 ---
Max 5.5 0.816 -1 ----15 120 1.2 4 4
Units V V A A %/V % s % MHz MHz MHz
Active , VFB = 0.78V, Not Switching Shutdown VIN = 2.7V to 5.5V 0A < ILOAD < 2A gm RT
---------
ROSC = 332k Switching Frequency
0.8 0.3 0.3
To be continued
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RT8015
Parameter Switch On Resistance, High Switch On Resistance, Low Peak Current Limit Under Voltage Lockout Threshold Shutdown Threshold Symbol RPMOS RNMOS ILIM
Conceptual
Test Conditions ISW = 0.5A ISW = 0.5A VDD Rising VDD Falling Min --2.2 ----
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Typ 110 110 3.2 2.4 2.3
Max 160 170 ----
Units m m A V V V
VIN - 0.7 VIN - 0.4
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. JA is measured in the natural convection at TA = 25 C on 4-layers high effective thermal conductivity test board of JEDEC 51-7 thermal measurement standard. The case point of JC is on the expose pad for SOP-8 (Exposed Pad) package.
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Conceptual Typical Operating Characteristics
Efficiency vs. Output Current
100 90 80
1.810 1.808 1.806
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RT8015
Output Voltage vs. Output Current
VIN = 3.3V
Efficiency (%)
70 60 50 40 30 20 10 0 0 250 500
VIN = 5V, VOUT = 1.8V VIN = 3.3V, VOUT = 1.8V
Output Voltage (V)
1.804 1.802 1.800 1.798 1.796 1.794 1.792 1.790
750 1000 1250 1500 1750 2000 2250
0
250
500
750
1000 1250 1500 1750 2000
Output Current (mA)
Output Current (mA)
Frequency vs. Temperature
1100
Peak Current Limited vs. Input Voltage
4.0
VIN = 3.3V, VOUT = 1.8V IOUT = 0A
1080
VOUT = 2.5V
Peak Current Limited (A)
Frequency (kHz)
3.5
1060
3.0
1040
2.5
1020
1000 -50 -25 0 25 50 75 100 125
2.0 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5
Temperature (C)
Input Voltage (V)
Quiescent Current vs. Input Voltage
550
Quiescent Current vs. Temperature
500
VIN = 3.3V
Quiescent Current (uA)
510
Quiescent Current (uA)
3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5
530
480
460
490
440
470
420
450
400 -50 -25 0 25 50 75 100 125
Input Voltage (V)
Temperature (C)
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RT8015
Conceptual
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Output Voltage vs. Temperature
1.820 1.815
0.804
VREF vs. Input Voltage
0.805
VIN = 3.3V
Output Voltage (V)
1.810
1.800 1.795 1.790
V REF (V)
1.805
0.803
0.802
0.801
1.785 1.780 -50 -25 0 25 50 75 100 125
0.800 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5
Temperature (C)
Input Voltage (V)
Load Transient Response
VIN = 3.3V, VOUT = 2.5V IOUT = 0A to 2A
Load Transient Response
VIN = 3.3V, VOUT = 2.5V IOUT = 1A to 2A
VOUT (50mV/Div)
VOUT (50mV/Div)
ILX (1A/Div) Time (50s/Div)
ILX (1A/Div) Time (50s/Div)
Output Ripple
VIN = 3.3V, VOUT = 2.5V IOUT = 2A
Output Ripple
VIN = 5V, VOUT = 2.5V IOUT = 2A
VOUT (10mV/Div)
VOUT (10mV/Div)
VLX (5V/Div)
VLX (5V/Div)
ILX (2A/Div) Time (250ns/Div)
ILX (2A/Div) Time (250ns/Div)
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DS8015-03C February 2007
Conceptual
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RT8015
Power Good
VIN = 3.3V, VOUT = 2.5V IOUT = 2A
Power On & Inductor Current
VIN = 3.3V, VOUT = 2.5V IOUT = 2A
VIN (2V/Div) PGOOD (2V/Div) VOUT (2V/Div) ILX (2A/Div) Time (1ms/Div)
VIN (2V/Div) VOUT (2V/Div) VLX (5V/Div) ILX (2A/Div) Time (1ms/Div)
Power On & Inductor Current
VIN = 5V, VOUT = 2.5V IOUT = 2A
Soft Start and Inrush Current
VIN = 3.3V, VOUT = 2.5V IOUT = 2A
VIN (2V/Div) VOUT (2V/Div) VLX (5V/Div) ILX (2A/Div) Time (1ms/Div)
VIN (2V/Div) VLX (5V/Div) VOUT (2V/Div) I IN (2A/Div) Time (2.5ms/Div)
Soft Start and Inrush Current
VIN = 5V, VOUT = 2.5V IOUT = 2A
VIN (2V/Div) VLX (5V/Div) VOUT (2V/Div) I IN (2A/Div) Time (2.5ms/Div)
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RT8015
Application Information
Conceptual
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The basic RT8015 application circuit is shown in Typical Application Circuit. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. Operating Frequency Selection of the operating frequency is a tradeoff between efficiency and component size. High frequency operation allows the use of smaller inductor and capacitor values. Operation at lower frequency improves efficiency by reducing internal gate charge and switching losses but requires larger inductance and/or capacitance to maintain low output ripple voltage. The operating frequency of the RT8015 is determined by an external resistor that is connected between the RT pin and ground. The value of the resistor sets the ramp current that is used to charge and discharge an internal timing capacitor within the oscillator. The RT resistor value can be determined by examining the frequency vs. RT curve. Although frequencies as high as 4MHz are possible, the minimum on-time of the RT8015 imposes a minimum limit on the operating duty cycle. The minimum on-time is typically 110ns. Therefore, the minimum duty cycle is equal to 100 x 110ns x f(Hz). Inductor Selection For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current IL increases with higher VIN and decreases with higher inductance.
The transition from low current operation begins when the peak inductor current falls below the minimum peak current. Lower inductor values result in higher ripple current which causes this to occur at lower load currents. This causes a dip in efficiency in the upper range of low current operation.
4.5 4 3.5
Frequency (MHz)
3 2.5 2 1.5 1 0.5 0 0 100 200 300 400 500 600 700 800 900 100 1000 0
RT = 154k for 2MHz
RT = 332k for 1MHz
RRT (k ) RT (k)
Figure 1 Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or mollypermalloy cores. Actual core loss is independent of core size for a fixed inductor value but it is very dependent on the inductance selected. As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates "hard", which means that inductance collapses abruptly when the peak design current is exceeded. This result in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate!
V V IL = OUT 1 - OUT VIN f x L
Having a lower ripple current reduces the ESR losses in the output capacitors and the output voltage ripple. Highest efficiency operation is achieved at low frequency with small ripple current. This, however, requires a large inductor. A reasonable starting point for selecting the ripple current is I = 0.4(IMAX). The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : VOUT VOUT L= 1 - V IN(MAX) f x IL(MAX)
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DS8015-03C February 2007
Conceptual
Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don't radiate energy but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price vs. size requirements and any radiated field/EMI requirements. CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by : V VIN IRMS = IOUT(MAX) OUT -1 VIN VOUT This formula has a maximum at VIN = 2VOUT, where I RMS = I OUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, VOUT, is determined by : 1 VOUT IL ESR + 8fCOUT The output ripple is highest at maximum input voltage since IL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only
DS8015-03C February 2007
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RT8015
use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Output Voltage Programming The output voltage is set by an external resistive divider according to the following equation : VOUT = VREF x 1 + R1 R2 where VREF equals to 0.8V typical. The resistive divider allows the FB pin to sense a fraction of the output voltage as shown in Figure 2.
VOUT R1 FB RT8015 GND R2
Figure 2. Setting the Output Voltage
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RT8015
Efficiency Considerations
Conceptual
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The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as : Efficiency = 100% - (L1+ L2+ L3+ ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses: VDD quiescent current and I2R losses. The VDD quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence. 1. The VDD quiescent current is due to two components : the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge Q moves from VDD to ground. The resulting Q/t is the current out of VDD that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT+QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VDD and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW and external inductor RL. In continuous mode the average output current flowing through inductor L is "chopped" between the main switch and the synchronous switch. Thus, the series resistance looking into the LX pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (D) as follows : RSW = RDS(ON)TOP x D + RDS(ON)BOT x (1"D) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply
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the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% of the total loss. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ILOAD(ESR), where ESR is the effective series resistance of C OUT. ILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The COMP pin external components and output capacitor shown in Typical Application Circuit will provide adequate compensation for most applications. Thermal Considerations For continuous operation, do not exceed absolute maximum operation junction temperature 125 C. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junctions to ambient. The maximum power dissipation can be calculated by following formula: PD(MAX) = ( TJ(MAX) - TA ) / JA Where T J(MAX) is the maximum operation junction temperature 125C, TA is the ambient temperature and the JA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT8015, where T J(MAX) is the maximum junction temperature of the die (125C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance for SOP-8 (Exposed Pad) package is 75C/W on the standard JEDEC 51-7 (4 layers, 2S2P) thermal test board. The copper thickness is 2oz. The maximum power dissipation at TA = 25C can be calculated by following formula: PD (MAX) = (125C - 25C) / (75C/W) = 1.33W (SOP-8 Exposed Pad on the minimum layout)
DS8015-03C February 2007
Conceptual
Layout Considerations The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance JA. For RT8015 package, the Figure 3 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. The thermal resistance JA of SOP-8 (Exposed Pad) is determined by the package design and the PCB design. However, the package design had been designed. If possible, it' s useful to increase thermal performance by the PCB design. The thermal resistance JA can be decreased by adding a copper under the exposed pad of SOP-8 (Exposed Pad) package. As shown in Figure 4, the amount of copper area to which the SOP-8 (Exposed Pad) is mounted affects thermal performance. When mounted to the standard SOP-8 (Exposed Pad) pad (Figure 4.a), JA is 75C/W. Adding copper area of pad under the SOP-8 (Exposed Pad) (Figure 4.b) reduces the JA to 64C/W. Even further, increasing the copper area of pad to 70mm2 (Figure 4.e) reduces the JA to 49C/W.
2.4 2
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RT8015
(a) Copper Area = (2.3 x 2.3) mm2, JA = 75C/W
(b) Copper Area = 10mm2, JA = 64C/W
(c) Copper Area = 30mm2, JA = 54C/W
Power Dissipation (W)
1.6 1.2 0.8 0.4 0 0 20 40 60 80
Copper Area 70mm2 50mm2 30mm2 10mm2 Min. layout
(d) Copper Area = 50mm2, JA = 51C/W
100
120
140
Ambient Temperature (C)
Figure 3. Derating Curve for Package (e) Copper Area = 70mm2, JA = 49C/W Figure 4. Thermal Resistance vs. Copper Area Layout Thermal Design
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RT8015
Datasheet Revision History
Version 00C Data Page No.
Conceptual
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Item first edition Layout Guide
Description
01C 02C 03C
2006/9/11 2006/10/12 2007/2/8
Functional Pin Description Application Information Outline Information
Modify Modify Modify Logo
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DS8015-03C February 2007
Conceptual Outline Information
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RT8015
A
H M
EXPOSED THERMAL PAD (Bottom of Package)
Y J X B
F
C I D
Symbol A B C D F H I J M X Y
Dimensions In Millimeters Min 4.801 3.810 1.346 0.330 1.194 0.170 0.000 5.791 0.406 1.900 1.900 Max 5.004 4.000 1.753 0.510 1.346 0.254 0.152 6.200 1.270 2.700 3.600
Dimensions In Inches Min 0.189 0.150 0.053 0.013 0.047 0.007 0.000 0.228 0.016 0.075 0.075 Max 0.197 0.157 0.069 0.020 0.053 0.010 0.006 0.244 0.050 0.106 0.142
8-Lead SOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
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